The present invention relates to a data processing system that makes it possible to perform a comprehensive evaluation of cooperative data processing performed by a plurality of control modules coupled through a communication path. More specifically, the present invention relates to an effective technology applicable, for instance, to an in-vehicle electronic control system in which a plurality of electronic control units (ECUs) is coupled to an in-vehicle network.
Electronic devices are increasingly used, for instance, in automobiles to increase the total number of control modules. This results in an increase in the number of man-hours required for developing an embedded system. Hence, a software development process is now being reviewed. A process of verifying an actual embedded system that is performed during a currently employed embedded system development process is mainly based on simulation. Systems proposed in Japanese Unexamined Patent Publications No. 2010-204934, No. Hei 09 (1997)-218800, and No. 2012-190197 are configured to improve the above situation.
The systems proposed in Japanese Unexamined Patent Publications No. 2010-204934 and No. Hei 09 (1997)-218800 are configured to analyze software for a processor having a data bus and an address bus. The systems insert a tag statement in an arbitrary place in the software in order to output tag information to a predetermined address within an address space. Next, the systems couple a debugging device to an external output bus of the processor in order to monitor the bus access of the processor. When the software is executed to output the tag information, the debugging device identifies the tag information in accordance with information derived from bus monitoring, acquires the tag information, and records the tag information and time. The recorded tag information and time are transferred to a calculation section and analytically processed to analyze the software.
The system proposed in Japanese Unexamined Patent Publication No. 2012-190197 is configured to analyze software that runs in a plurality of processors. The system includes an image processing device, which is to be observed, and an external device, which provides log analysis. The image processing device includes one main CPU and one or more sub-CPUs. The main CPU issues a command to the sub-CPUs and records the time of command issuance. The sub-CPUs record the time of command execution. The external device collects the logs of the main CPU and sub-CPUs, and analyzes the operating status of the main CPU and sub-CPUs in accordance with the time of command issuance and the time of command execution.